Hi Steve,

Thanks for the comments, and you are absolutely right. To be fair, if I were giving a 400-level course instead of a napkins dialogue, I'd be paying closer attention to some of the nuances as you suggest. As I'm trying to bridge the gap of understanding from people in (admittedly extremely) broad strokes, As you can imagine it's hard to capture the HW/SW divide as it varies between architectures. While the NS talks about MMU, in many architectures there is something else called a IOMMU. I had to draw the line somewhere between what is signal and what is noise.

I am reconsidering your points, however. If I want to add a little more detail, I could do that along with the disclaimer that your mileage may vary with respect to HW/SW partitioning. I just don't want to get so mired in the minutiae that I lose sight of the forest through the trees and wind up making the ND a burden for people to read.

Besides, if you think this one glosses over some details, just wait until we talk about how data is written to disks...

*sigh*

:)

Thanks again for the comment!